ECE Colloquium - March 26, 2014

Dr. George Celler, Rutgers University, IAMDN

DateTime: 
Wednesday, March 26, 2014 - 10:00am - 11:00am
Location: 

CoRE Building Lecture Hall


Semiconductor Technology Roadmap, its purpose and some examples

Abstract:   Global semiconductor business exceeds $350B in annual revenues, and semiconductor processing equipment adds additional $50B/year. Even though the technology companies fiercely compete with each other, there is also a lot of interdependence, as nobody can do it alone. Each semiconductor manufacturer depends on a vast infrastructure of hardware and software suppliers. In this highly dynamic environment, rapid progress as marked by Moore's law that predicts (and effectively requires) doubling of integrated circuit performance every two years would not be possible without a large degree of coordination between all the technology participants. For this purpose a roadmapping organization was formed in 1991, and it has evolved into a large team effort that develops and maintains the International Technology Roadmap for Semiconductors (ITRS).

I will describe the motivation for the ITRS and related roadmapping activities and how the roadmap is developed. Then I will provide some examples of what the ITRS is predicting for the future electronic devices

Biography:   Dr. George K Celler received his Ph.D. in physics from Purdue University. He is a Research Professor at the Materials Science and Engineering Dept. and the Institute for Advanced Materials, Devices, and Nanotechnology (IAMDN) at Rutgers University. Previously he was Chief Scientist at Soitec USA, where he was responsible for technical interactions and collaborations with the US industry and academia in the field of substrate engineering. Before joining Soitec in 2001, he spent 25 years at Bell Laboratories, where he was a Distinguished Member of Technical Staff and Technical Manager. In addition to his long-term interest in silicon-on-insulator structures and their applications, he also investigated laser annealing and rapid thermal processing of semiconductors, diffusion phenomena in Si and silicon dioxide, and electro-optical properties of GaAs. He led a large DARPA supported x-ray lithography program at Bell Labs and was a Deputy Manager of X-Ray Lithography Consortium. He published over 200 articles, edited nine books, and was issued 22 US patents. He is a fellow of the American Physical Society and of The Electrochemical Society, and a member of IEEE, OSA, and MRS. From 2002 to 2012 he led a SOI subcommittee of the International Technology Roadmap for Semiconductors (ITRS) and a SOI Standards subcommittee of SEMI. He is a member of the Board of MIT Microphotonics Consortium and a member of External Advisory Board of the NSF-funded MRSEC at Georgia Tech. on epitaxial graphene. He is an Associate Editor of the ECS Journal of Solid State Science and Technology, and the ECS Solid State Letters.