Jaeseok ("Jae") Jeon

Assistant Professor

jaeseok-jeon.jpg

Education:
Ph.D. in Electrical Engineering, University of California, Berkeley, 2011.
B.A.Sc. in Electronics Engineering with First Class Honours, Simon Fraser University, Canada, 2007.

Research Interests:
Nanoelectronic Materials, Devices and Processing Technologies
Nano-Electro-Mechanical Systems (NEMS)

Awards and Recognitions:
IEEE ISSCC Jack Raper Award for Outstanding Technology Directions, 2011.
NSERC (Natural Science & Engineering Research Council) USRA Award, Canada, 2006.

Selected Publications:
J. Jeon, L. Hutin, R. Jevtić, N. Liu, Y. Chen, R. Nathanael, W. Kwon, M. Spencer, E. Alon, B. Nikolić, and T.-J. K. Liu,
“Multiple-Input Relay Design for More Compact Implementation of Digital Logic Circuits,”
.IEEE Electron Device Letters (EDL), vol. 33, no. 2, pp. 281-283, Feb. 2012.

W. Kwon, J. Jeon, L. Hutin, and T.-J. K. Liu,
“Electro-Mechanical Diode Memory Cell Design for Cross-Point Memory Arrays,”
.IEEE Electron Device Letters (EDL), vol. 33, no. 2, pp. 131-133, Feb. 2012.

E. Park, J. Jeon, V. Subramanian, and T.-J. K. Liu,
“Inkjet-Printed Microshell Encapsulation: A New Zero-Level Packaging Technology,”
.Proc. of the IEEE 25th Int'l Conf. on Micro-Electro-Mechanical-Systems (MEMS'12), pp. 357-360, Feb. 2012.

Invited: T.-J. K. Liu, J. Jeon, R. Nathanael, H. Kam, V. Pott, and E. Alon,
“Prospects for MEM Logic Switch Technology,”
.IEEE Int’l Electron Devices Meeting (IEDM'10) Tech. Digest, pp. 424-427, Dec. 2010.

Invited: V. Pott, H. Kam, R. Nathanael, J. Jeon, E. Alon, and T.-J. K. Liu,
“Mechanical Computing Redux: Relays for Integrated Circuit Applications,”
.Proc. of the IEEE, vol. 98, no. 12, pp. 2076-2094, Dec. 2010.

Y. S. Hu, J. Jeon, T. J. Seok, S. Lee, A. Schwartzberg, J. H. Hafner, R. A. Drezek, and H. Choo,
“Enhanced Raman Scattering from Nanoparticle-Decorated Nanocone Substrates: a Practical Approach to Harness In-Plane Excitations,”
.ACS Nano, vol. 4, no. 10, pp. 5721-5730, Oct. 2010.

J. Jeon, V. Pott, H. Kam, R. Nathanael, E. Alon, and T.-J. K. Liu,
“See-Saw Relay Logic and Memory Circuits,”
.IEEE/ASME Journal of Microelectromechanical Systems (JMEMS), vol. 19, no. 4, pp. 1012-1014, Aug. 2010.

J. Jeon, V. Pott, H. Kam, R. Nathanael, E. Alon, and T.-J. K. Liu,
“Perfectly Complementary Relay Design for Digital Logic Applications,”
.IEEE Electron Device Letters (EDL), vol. 31, no. 4, pp. 371-373, Apr. 2010.

F. Chen, M. Spencer, R. Nathanael, C. Wang, H. Fariborzi, A. Gupta, H. Kam, V. Pott, J. Jeon, T.-J. K. Liu, D. Marković, V. Stojanović, and E. Alon,
“Demonstration of Integrated Micro-Electro-Mechanical (MEM) Switch Circuits for VLSI Applications,”
.IEEE Int’l Solid-State Circuits Conf. (ISSCC'10) Digest of Tech. Papers, pp. 150-151, Feb. 2010.

R. Nathanael, V. Pott, H. Kam, J. Jeon, and T.-J. K. Liu,
“Four-Terminal Relay Technology for Complementary Logic,”
.IEEE Int’l Electron Devices Meeting (IEDM'09) Tech. Digest, pp. 223-226, Dec. 2009.

Email: 

jjeon @ ece.rutgers.edu

Contact No.: 

(848) 445-0436

Office: 

EE 217